Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI CircuitsThe modern electronic testing has a forty year history. Test professionals hold some fairly large conferences and numerous workshops, have a journal, and there are over one hundred books on testing. Still, a full course on testing is offered only at a few universities, mostly by professors who have a research interest in this area. Apparently, most professors would not have taken a course on electronic testing when they were students. Other than the computer engineering curriculum being too crowded, the major reason cited for the absence of a course on electronic testing is the lack of a suitable textbook. For VLSI the foundation was provided by semiconductor device techn- ogy, circuit design, and electronic testing. In a computer engineering curriculum, therefore, it is necessary that foundations should be taught before applications. The field of VLSI has expanded to systems-on-a-chip, which include digital, memory, and mixed-signalsubsystems. To our knowledge this is the first textbook to cover all three types of electronic circuits. We have written this textbook for an undergraduate “foundations” course on electronic testing. Obviously, it is too voluminous for a one-semester course and a teacher will have to select from the topics. We did not restrict such freedom because the selection may depend upon the individual expertise and interests. Besides, there is merit in having a larger book that will retain its usefulness for the owner even after the completion of the course. With equal tenacity, we address the needs of three other groups of readers. |
Contents
1 | 4 |
BOUNDARY SCAN STANDARD | 16 |
VLSI TESTING PROCESS AND TEST EQUIPMENT | 17 |
7 | 28 |
TEST ECONOMICS AND PRODUCT QUALITY | 35 |
Defects Errors and Faults | 57 |
LOGIC AND FAULT SIMULATION | 83 |
Modeling Levels and Types of Simulators | 91 |
MEMORY TEST | 257 |
DSPBASED ANALOG AND MIXEDSIGNAL TEST | 309 |
MODELBASED ANALOG AND MIXEDSIGNAL TEST | 385 |
DELAY TEST | 419 |
IDDQ TEST | 441 |
DIGITAL DFT AND SCAN DESIGN | 465 |
TESTABILITY MEASURES | 466 |
BUILTIN SELFTEST | 489 |
Timing | 98 |
83 | 116 |
COMBINATIONAL CIRCUIT TEST GENERATION | 155 |
6 | 204 |
SEQUENTIAL CIRCUIT TEST GENERATION | 211 |
3 | 238 |
THE FUTURE OF TESTING | 613 |
BIBLIOGRAPHY | 631 |
519 | 658 |
552 | 660 |
671 | |
Other editions - View all
Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI ... M. Bushnell,Vishwani Agrawal No preview available - 2013 |
Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI ... M. Bushnell,Vishwani Agrawal No preview available - 2004 |
Common terms and phrases
amplitude analog circuit analog test applied asynchronous circuits ATPG algorithm backtrace base cell Boolean boundary scan CFid chip circuit of Figure clock CMOS CODEC combinational circuit combinational logic component compute cost coupling faults cube D-cubes decoder delay fault delay test device DRAM DSP-based Equation error example fanout fault coverage fault effect fault list fault model fault simulation fault tests fault-free faulty circuit filter flip-flops frequency function graph hardware IDDQ current IDDQ testing IEEE initial leakage LFSR logic gate march test measurement memory method mixed-signal multi-tone multiple neighborhood node noise NPSF operation parameters path path-delay pattern primary inputs primary output problem propagation quantization random redundant requires sampling scan chain sensitive sequence sequential circuit shows signal stuck-at faults switching synchronous Table test vectors test-pattern testability tester time-frame transistor transition fault VLSI voltage