Field-Programmable Gate Array TechnologyStephen M. Trimberger, Stephen Trimberger Many different kinds of FPGAs exist, with different programming technologies, different architectures and different software. Field-Programmable Gate Array Technology describes the major FPGA architectures available today, covering the three programming technologies that are in use and the major architectures built on those programming technologies. The reader is introduced to concepts relevant to the entire field of FPGAs using popular devices as examples. Field-Programmable Gate Array Technology includes discussions of FPGA integrated circuit manufacturing, circuit design and logic design. It describes the way logic and interconnect are implemented in various kinds of FPGAs. It covers particular problems with design for FPGAs and future possibilities for new architectures and software. This book compares CAD for FPGAs with CAD for traditional gate arrays. It describes algorithms for placement, routing and optimization of FPGAs. Field-Programmable Gate Array Technology describes all aspects of FPGA design and development. For this reason, it covers a significant amount of material. Each section is clearly explained to readers who are assumed to have general technical expertise in digital design and design tools. Potential developers of FPGAs will benefit primarily from the FPGA architecture and software discussion. Electronics systems designers and ASIC users will find a background to different types of FPGAs and applications of their use. |
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Contents
Introduction | 1 |
12 What is an FPGA? | 2 |
13 Advantages of FPGAs | 4 |
Low Tooling Costs | 5 |
Effective Design Verification | 6 |
StandardProduct Advantages | 7 |
Life Cycle Advantages | 8 |
Speed of Circuitry | 9 |
Act2 Architecture | 113 |
Act3 Architecture | 117 |
Programming and Testing | 118 |
Capacity | 124 |
Performance | 127 |
34 Software | 128 |
35 The Future | 132 |
36 Design Applications | 133 |
15 Technology Trends | 10 |
Architecture | 11 |
17 Outline of Subsequent Chapters | 12 |
2 Programming Technology | 13 |
SRAM Programmable FPGAs | 15 |
Advantages and Disadvantages of SRAM Programming | 17 |
23 Device Architecture | 19 |
Design Tradeoffs | 23 |
The Xilinx XC2000 Architecture | 29 |
The Xilinx XC3000 Architecture | 35 |
The Xilinx XC4000 Architecture | 43 |
Programming the FPGA | 52 |
24 Software | 53 |
Automated Design Implementation | 54 |
TechnologySpecific Synthesis | 63 |
25 The Future | 65 |
Architecture | 66 |
Partitioning in Space and Time | 67 |
26 Design Applications | 68 |
Counter Examples | 70 |
Efficient Multiplication by a Constant in an Artificial Neural Network | 75 |
Distributed Arithmetic for Signal Processing | 77 |
Applications of Reprogramming | 79 |
A Fast Video Controller | 83 |
A Position Tracker For a Robot Manipulator | 84 |
A Fast DMA Controller | 85 |
Custom Computing Applications | 87 |
27 Acknowledgments | 90 |
28 References | 91 |
Antifuse Programmed FPGAs | 97 |
32 Programming Technology | 99 |
33 Device Architecture | 103 |
Routing Architecture of the Actel FPGAs | 108 |
Act1 Architecture | 110 |
A TTL Perspective | 137 |
Migrating PLD Designs to FPGAs | 140 |
Synthesis Design Flow | 143 |
Designing Counters with ACT Devices | 144 |
Designing Adders and Accumulators with the ACT Architecture | 153 |
State Machine Design | 160 |
Using FPGAs for Digital PLLs | 164 |
Customer Design Examples | 167 |
37 Acknowledgments | 168 |
Erasable Programmable Logic Devices | 171 |
42 Programming Technology | 173 |
Logic Structures Using EPROM Transistors | 175 |
43 Device Architecture | 179 |
Macrocell Architecture | 180 |
Programmable FlipFlops | 181 |
Programmable Clock | 182 |
Functional Testing | 183 |
Architectural Evolution in ArrayBased PLDs | 184 |
432 The MAX Multiple Array matriX Product Family | 187 |
433 MAX 7000 | 195 |
MaskProgrammed Logic Devices | 200 |
44 Software | 204 |
45 The Future | 218 |
46 Design Applications | 224 |
462 Using Expanders to Build Registered Logic in MAX EPLDs | 228 |
463 Simulating Internal Buses in GeneralPurpose EPLDs | 233 |
464 Fast Bus Controllers with the EPM5016 | 238 |
465 Micro Channel Bus Master and SDP Logic with the EPM5032 EPLD | 240 |
466 FIFO Controller Using an EPM7096 | 243 |
467 Integrating an Intelligent IO Subsystem with a Single EPM5130 EPLD | 246 |
468 Controlling Complex CCD Imaging Systems with the EPS464 EPLD | 247 |
47 References | 250 |
| 253 | |
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Common terms and phrases
Act2 Act3 Actel Actl adder AHDL algorithms allows Altera antifuse applications bits buffer capacitance channel chip CMOS combinational logic combinatorial configuration connections control signals counter Custom dedicated input delay density Design Automation design entry enable EPLD EPROM expander product terms fan-out feedback Field Programmable FIFO flip-flop FPGA architectures FPGA design global clock horizontal I/O pins IEEE implement Integrated Circuits interface internal latch Logic Array logic functions logic modules logic synthesis lookup table macro macrocell MAX+PLUS memory cell MPGA MPLD multiplexer multiplexor netlist optimization output partitioning path performance pips placed and routed placement processor product terms Programmable Gate Arrays Programmable Interconnect Programmable Logic Programmable Logic Devices prototype reprogrammable routability S-module schematic shown in Figure simulation single speed SRAM structure sum-of-products switch switchbox synchronous three-state transistor tri-state tri-state buffer typical vertical Waveform Editor Xilinx XOR gate
Bibliographic information
| Title | Field-Programmable Gate Array Technology |
| Editors | Stephen M. Trimberger, Stephen Trimberger |
| Edition | illustrated |
| Publisher | Springer Science & Business Media, 1994 |
| ISBN | 0792394194, 9780792394198 |
| Length | 258 pages |
| Subjects | › › › Computers / CAD-CAM Technology & Engineering / Electrical Technology & Engineering / Electronics / Circuits / General |
| Export Citation | BiBTeX EndNote RefMan |