Principles of CMOS VLSI Design: A Systems Perspective
This popular introduction to CMOS VLSI design has been revised extensively to reflect changes in the technology and trends in the industry. Covering CMOS design from a digital systems level to the circuit level, and providing a background in CMOS processing technology, the book includes both an explanation of basic theory and a guide to good engineering practice. The material is of use to designers employing gate array, standard cell, or custom design approaches. Since the first edition appeared, CMOS technology has assumed a central position in modern electronic system design. Processes have grown denser, and automated design tools have become common, leading to far more complex chips operating at much higher speeds. With these advances, CMOS design approaches have changed, reflected here in greater emphasis on clocking, power distribution, design margining, and testing.
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adder antifuse array BiCMOS block buffer capacitor channel chip circuit clock CMOS CMOS inverter CMOS process connected cycle datapath decoder delay design rules device diffusion diffusion capacitance drive dynamic effect electrons Elmore delay etch example Figure floorplan function gate capacitance gate oxide IEEE JSSC implementation increases input interconnect latch latchup layer layout leakage lines load logic gates logical effort mask memory metal module multiplexer n-well NAND gate nMOS transistor node operation output p-device p-type parameters parasitic path pMOS poly polysilicon power dissipation precharge pseudo-nMOS pull-down pull-up ratio reduce region register file resistor routing saturation schematic Section shown in Fig shows signal silicon simulation source and drain source/drain specified speed stage standard cells static structure substrate switch threshold voltage tion transmission gate tristate Verilog VLSI volts wafer width wire XOR gate