Statistical Modeling for Computer-Aided Design of MOS VLSI CircuitsAs MOS devices are scaled to meet increasingly demanding circuit specifications, process variations have a greater effect on the reliability of circuit performance. For this reason, statistical techniques are required to design integrated circuits with maximum yield. Statistical Modeling for Computer-Aided Design of MOS VLSI Circuits describes a statistical circuit simulation and optimization environment for VLSI circuit designers. The first step toward accomplishing statistical circuit design and optimization is the development of an accurate CAD tool capable of performing statistical simulation. This tool must be based on a statistical model which comprehends the effect of device and circuit characteristics, such as device size, bias, and circuit layout, which are under the control of the circuit designer on the variability of circuit performance. The distinctive feature of the CAD tool described in this book is its ability to accurately model and simulate the effect in both intra- and inter-die process variability on analog/digital circuits, accounting for the effects of the aforementioned device and circuit characteristics. Statistical Modeling for Computer-Aided Design of MOS VLSI Circuits serves as an excellent reference for those working in the field, and may be used as the text for an advanced course on the subject. |
Contents
Introduction | v |
Survey of Statistical Modeling and Simulation Techniques | ix |
Statistical MOS Model | 1 |
Experimental Process Characterization for MOS Statistical Model | 37 |
CAD Implementation of the SMOS Model | 71 |
Statistical CAD of Analog MOS Circuits | 91 |
Applications of the SMOS Model to Digital Integrated Circuits | 109 |
Conclusions | 141 |
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Statistical Modeling for Computer-Aided Design of MOS VLSI Circuits Christopher Michael,Mohammed Ismail No preview available - 2012 |
Common terms and phrases
analog circuits Analysis APLAC bias BSIM model BSIM parameters Chapter circuit design circuit layout circuit optimization circuit performance circuit simulation CMOS Computer-Aided Design coordinate method correlation matrix current mirror current mirror circuit determined device area device mismatch device model differential pair differential voltage digital circuits distance dependence effect Endfor equation fabrication process input file integrated circuits inter-die parameter intradie mismatch variance model model decks model file model fitting constants model parameters MOSFET n-channel MOSFETs NMOS noise margins npar offset voltage op-amp p-channel parameter correlations parameter extraction parameter means parameter mismatch variance parameter variance PCA coefficients PMOS preserve Principal Component Principal Component Analysis process variations sense amplifier separation distance shown in Figure SMOS model SPICE model standard deviation statistical circuit statistical model statistical parameter model statistical simulation threshold voltage transistor pair unit normal random variability X2MS