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" SM Reddy, CJ Lin, and S. Patil, "An automatic test pattern generator for the detection of path delay faults, "
Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI ... - Page 660
by M. Bushnell, Vishwani Agrawal - 2004 - 690 pages
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Digital Circuit Testing and Testability

Parag K. Lala - Computers - 1997 - 222 pages
...faults in a combinational circuit," Proc. Intl. Test Conf.. pp. 1027-1034 t 1987). 2.1 1 Reddy, SM. C. Lin and S. Patil, "An automatic test pattern generator for the detection of path delay faults," Proc. IEEE Intl. Conf. on CAD. pp. 284-287 tNovember 1987). 2.12 Schulz. MH. K. Fuchs and F. Fink,...
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Random Testing of Digital Circuits: Theory and Applications

David - Technology & Engineering - 1998 - 514 pages
...Machinery, Harward University Press, Cambridge (MA), USA, pp. 142-145. 1951. [LiRePa 87] C. Lin, SM Reddy, and S. Patil, "An Automatic Test Pattern Generator for the Detection of Path Delay Faults," Proc. of Int. Conf. on Computer-Aided Design. pp. 284-287. 1987. [ Li 87] JM Liu, Test aleatoire de...
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The Best of ICCAD: 20 Years of Excellence in Computer-Aided Design

Andreas Kuehlmann - Computers - 2003 - 744 pages
...CJ Lin and SM Reddy, “On Delay Fault Testing in Logic Circuits,” ICCAD, pp. 148-151, 1986. [76] SM Reddy, CJ Lin and S. Patil, “An Automatic Test...Generator for the Detection of Path Delay Faults,” ICCAD, pp. 284-287, 1987. [77] S. Pad! and SM Reddy, “A Test Generation System for Path Delay Faults,”...
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Testing of Digital Systems

N. K. Jha, S. Gupta - Computers - 2003 - 1022 pages
...Proc. Int. Symposium Fault-Tolerant Computing, pp. 44—49. Reddy. SM. Lin. CJ. and Patil, S. (1987). An automatic test pattern generator for the detection of path delay faults. In Proc. Int. Conference on Computer-Aided Design, pp. 284-287. Savir, J. and McAnney. WH (1986). Random pattern...
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