CMOS Digital Integrated Circuits: Analysis and DesignThe fourth edition of CMOS Digital Integrated Circuits: Analysis and Design continues the well-established tradition of the earlier editions by offering the most comprehensive coverage of digital CMOS circuit design, as well as addressing state-of-the-art technology issues highlighted by the widespread use of nanometer-scale CMOS technologies. In this latest edition, virtually all chapters have been re-written, the transistor model equations and device parameters have been revised to reflect the sigificant changes that must be taken into account for new technology generations, and the material has been reinforced with up-to-date examples. The broad-ranging coverage of this textbook starts with the fundamentals of CMOS process technology, and continues with MOS transistor models, basic CMOS gates, interconnect effects, dynamic circuits, memory circuits, arithmetic building blocks, clock and I/O circuits, low power design techniques, design for manufacturability and design for testability. |
Other editions - View all
CMOS Digital Integrated Circuits: Analysis and Design Sung-Mo Kang,Yusuf Leblebici Snippet view - 2003 |
CMOS Digital Integrated Circuits: Analysis and Design, Issue 2005 Sung-Mo Kang,Yusuf Leblebici No preview available - 2002 |
CMOS Digital Integrated Circuits Analysis & Design Sung-Mo (Steve) Kang,Yusuf Leblebici No preview available - 2002 |
Common terms and phrases
adder array BiCMOS bit line calculate carrier cell channel length charge chip circuit design circuit performance Cjsw Cload clock signal CMOS inverter CMOS logic current-voltage depletion region design rules device diffusion regions digital circuits drain current driver transistor electron fabrication Figure FPGA function gate oxide gate voltage input voltage integrated circuits interconnect inversion layer inverter circuit junction capacitance latch load capacitance logic circuits logic gates mask layout metal minimum MOSFET n-channel MOSFET n-well nMOS transistor operation output node output voltage p-type p-type substrate parasitic capacitances pMOS polysilicon power consumption power dissipation power supply voltage precharge propagation delay scaling short-channel shown in Fig silicon simulation SiO2 source and drain SPICE structure substrate surface switching threshold voltage typical VLSI voltage level Vout waveforms width word line ם ם ם