Analog-Baseband Architectures and Circuits for Multistandard and Low-Voltage Wireless TransceiversThe prospect of initializing a network-ubiquitous society in the years to come has led to the development of multistandard-compliant wireless transceivers for seamless roaming among multiple networks. To ensure a commercial success of such a development, the manufacturing cost and power consumption of the system chips have to be minimized. The use of an advanced technology and a high level of integration have continued to be the most effective ways for cost and power minimization, given that wireless chips integrate large amounts of digital logic for computation. Regrettably, entering into the nanoelectronics era, the thinner transistor gate oxide implicates great challenges in the design of the analog front-ends. While a low-voltage supply is imposed to maintain device reliability, a relatively large threshold voltage is also necessitated to limit the leakage current. Thus, transceiver architectures and circuits which will befit future full integration of multistandard wireless transceivers in sub-1V nanoscale CMOS processes must be highly reconfigurable and robustly operational underneath a l- voltage supply. This book presents novel analog-baseband architectures and circuits that help realizing multistandard and low-voltage wireless transceivers. The main contents are presented from Chapter 2 to Chapter 6, as pictorially outlined in Figure 1. Chapter 1 overviews the current wireless-IC developments and presents the motivation and research objectives of this book. xi xii Preface Figure 1. |
Contents
List of Abbreviations 1 INTRODUCTION | 1 |
analogbaseband platform for wideband applications 6 References 6 2 TRANSCEIVER ARCHITECTURE SELECTIONREVIEW | 9 |
and Ultra Wideband 802 15 3 20 5 Survey of the stateoftheart works for modern wireless | 32 |
TWOSTEP CHANNEL SELECTIONA TECHNIQUE | 41 |
Proposed flexibleIF reception for multistandardability 75 reconfiguration 76 frontend simplification 78 specification 79 Gain plan 81 Specification o... | 89 |
AN EXPERIMENTAL 1V SIP RECEIVER ANALOGBASEBAND | 143 |
References | 176 |
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amplifier analog Applications architecture band bandwidth baseband blocks Bluetooth channel channel-selection Chapter chip Circuits Conference ISSCC CMOS communication Conversion dc-offset cancellation desired differential Digest of Technical Direct Direct-Conversion direct-up downconversion effective employed et al filter frequency functional gain IEEE International Solid-State image-rejection implemented input Integrated International Solid-State Circuits June linearity loop low-IF low-voltage lower Mb/s mismatch mixer mode Modulation multistandard noise offset OpAmp operation output performance phase pole presented Proc proposed quadrature Radio range realizing receiver reconfigurable reference rejection respectively selection Sept shared shown in Figure shows signal simulation Solid-State Circuits Conference stage standards step summary supply switching synthesizer Table Technical Papers technique Transceiver Transmitter voltage WCDMA wideband wireless WLAN zero-IF ZIF/DU