Hardware/Software Co-Design: Principles and PracticeIntroduction to Hardware-Software Co-Design presents a number of issues of fundamental importance for the design of integrated hardware software products such as embedded, communication, and multimedia systems. This book is a comprehensive introduction to the fundamentals of hardware/software co-design. Co-design is still a new field but one which has substantially matured over the past few years. This book, written by leading international experts, covers all the major topics including:
Special chapters describe in detail several leading-edge co-design systems including Cosyma, LYCOS, and Cosmos. Introduction to Hardware-Software Co-Design contains sufficient material for use by teachers and students in an advanced course of hardware/software co-design. It also contains extensive explanation of the fundamental concepts of the subject and the necessary background to bring practitioners up-to-date on this increasingly important topic. |
Contents
3 | 74 |
4 | 113 |
5 | 149 |
7 | 234 |
8 | 263 |
HardwareSoftware Partitioning using the LYCOS System | 283 |
10 | 307 |
| 359 | |
| 387 | |
Other editions - View all
Hardware/Software Co-Design: Principles and Practice Jørgen Staunstrup,Wayne Wolf Limited preview - 1997 |
Hardware/Software Co-Design: Principles and Practice Jørgen Staunstrup,Wayne Wolf No preview available - 2010 |
Common terms and phrases
abstract channels algorithm allocation allows application arbiter ASIC behavior blocks buffer C-VHDL CDFG circuit clock cycles co-processors co-simulation co-synthesis communication unit compiler complex components computation concurrent constraints context switching Cosyma data flow datapath debugging described design space embedded processors embedded systems environment example execution flow graph formal verification FPGA FSMD functional units global hardware and software hardware description languages hardware/software co-design hardware/software partitioning high-level synthesis IEEE implementation input instruction-set INTEGER interconnect interface logic loop LYCOS machine mapped microcontroller modules multiprocessor NEXTSTATE nodes operations optimization output parallel performance pipelining ports primitives procedure programming languages protocol prototyping Quenya retargetable retargetable compiler RPCall scheduling sequence shared memory shown in Figure signal simulation solution specialization specification languages step structure synchronization system-level target architecture techniques tion transformations validation verification VHDL VLIW Xilinx